Renesas Electronics /R7FA6T2BD /SPI_B0 /SPDECR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SPDECR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (000)SCKDL0 (000)SLNDL0 (000)SPNDL

SLNDL=000, SCKDL=000, SPNDL=000

Description

SPI Delay Control Register

Fields

SCKDL

RSPCK Delay

0 (000): 1RSPCK

1 (001): 2RSPCK

2 (010): 3RSPCK

3 (011): 4RSPCK

4 (100): 5RSPCK

5 (101): 6RSPCK

6 (110): 7RSPCK

7 (111): 8RSPCK

SLNDL

SSL Negation Delay

0 (000): 1RSPCK

1 (001): 2RSPCK

2 (010): 3RSPCK

3 (011): 4RSPCK

4 (100): 5RSPCK

5 (101): 6RSPCK

6 (110): 7RSPCK

7 (111): 8RSPCK

SPNDL

SPI Next-Access Delay

0 (000): 1RSPCK + 5TCLK

1 (001): 2RSPCK + 5TCLK

2 (010): 3RSPCK + 5TCLK

3 (011): 4RSPCK + 5TCLK

4 (100): 5RSPCK + 5TCLK

5 (101): 6RSPCK + 5TCLK

6 (110): 7RSPCK + 5TCLK

7 (111): 8RSPCK + 5TCLK

Links

() ()